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rev. 1.40 1 january 16, 2014 rev. 1.00 pb january 16, 2014 ht2201 cmos 1k 2-wire serial eeprom features ? operating voltage: 1.8v~5.5v for temperature -40c to +85c ? low power consumption C operation: 5ma max. C standby: 2a max. ? internal organization: 1288 ? 2-wire serial interface ? write cycle time: 5ms max. ? automatic erase-before-write operation ? write operation with built-in timer ? 40-year data retention ? 10 6 erase/write cycles per word ? sot23-5 package general description the ht2201 is a 1k-bit serial read/write non-volatile memory device using the cmos foating gate process. its 1024 bits of memory are organized into 128 words and each word is 8 bits. the device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential. the ht2201 is guaranteed for 1 million erase/write cycles and 40-year data retention. block diagram

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? ? ? pin assignment selection table part no. capacity v dd clock rate (khz) write speed @2.4v(ms) operating current @5.0v(ma) standby current @5.0v(a) package marking ht2201 1288 1.8v~5.5v 400 5 5 2 sot23-5 2201+ pin description pin name i/o description sda i/o serial data input/output scl i serial clock data input vss negative power supply, ground vcc positive power supply
rev. 1.40 2 january 16, 2014 ht2201 absolute maximum ratings supply voltage ......................... v ss? 0.3v to v ss +6.0v input voltage ............................ v ss? 0.3v to v cc +0.3v storage temperature ........................... ?50c to 125c operating temperature ......................... ?40c to 85c note: these are stress ratings only. stresses exceeding the range specifed under absolute maximum ratings may cause substantial damage to the device. functional operation of this device at other conditions beyond those listed in the specifcation is not implied and prolonged exposure to extreme conditions may affect device reliability. d.c. characteristics ta=-40c~+85c symbol parameter test conditions min. typ. max. unit v cc conditions v cc operating voltage -40c~+85c 1.8 5.5 v i cc1 operating current 5v read at 400khz 2 ma i cc2 operating current 5v write at 400khz 5 ma v il input low voltage -0.45 0.3v cc v v ih input high voltage 0.7v cc v cc +0.5 v v ol output low voltage 2.4v i ol =2.1ma 0.4 v 1.8v i ol =0.7ma 0.2 v i li input leakage current 5v v in =0 or v cc 1 a i lo output leakage current 5v v out =0 or v cc 1 a i stb standby current 5v v in =0 or v cc 2 a 1.8v v in =0 or v cc 2 a c in input capacitance (see note) f=1mhz, 25 c 6 pf c out output capacitance (see note) f=1mhz, 25 c 8 pf note: these parameters are periodically sampled but not 100% tested.
rev. 1.40 3 january 16, 2014 ht2201 a.c. characteristics ta=-40c~+85c symbol parameter remark v cc =1.8v~5.0v v cc =2.5v~5.0v unit min. max. min. max. f sk clock frequency 400 1000 khz t high clock high time 600 400 ns t low clock low time 1200 600 ns t r sda and scl rise time note 300 300 ns t f sda and scl fall time note 300 300 ns t hd:sta start condition hold time after this period the frst clock pulse is generated 600 250 ns t su:sta start condition setup time only relevant for repeated start condition 600 250 ns t hd:dat data input hold time 0 0 ns t su:dat data input setup time 150 100 ns t su:sto stop condition setup time 600 250 ns t aa output valid from clock 900 600 ns t buf bus free time time in which the bus must be free before a new transmission can start 1200 500 ns t sp input filter time constant (sda and scl pins) noise suppression time 50 50 ns t wr write cycle time 5 5 ms endurance 25 c, page mode 5.0v 1,000,000 write cycles note: these parameters are periodically sampled but not 100% tested. for relative timing, refer to timing diagrams.
rev. 1.40 4 january 16, 2014 ht2201 functional description pin function ? serial clock C scl the scl input is used for positive edge clock data into each eeprom device and negative edge clock data out of each device. ? serial data C sda the sda pin is bidirectional for serial data transfer. the pin is open-drain driven and may be wired-or with any number of other open-drain or open collector devices. memory organization ? ht2201, 1k serial eeprom internally organized with 1288-bit words, the ht2201 requires an 8-bit data word address for random word addressing. device operations ? clock and data transition data transfer may be initiated only when the bus is not busy. during data transfer, the data line must remain stable whenever the clock line is high. changes in data line while the clock line is high will be interpreted as a start or stop condition. ? start condition a high-to-low transition of sda with scl high is a start condition which must precede any other command (refer to start and stop definition timing diagram). ? stop condition a low-to-high transition of sda with scl high is a stop condition. after a read sequence, the stop command will place the eeprom in a standby power mode (refer to start and stop definition timing diagram). ? acknowledge all addresses and data words are serially transmitted to and from the eeprom in 8-bit words. the eeprom sends a zero to acknowledge that it has received each word. this happens during the ninth clock cycle.

device addressing the ht2201 requires an 8-bit device address word following a start condition to enable the chip for a read or write operation. the device address word consist of a mandatory one, zero sequence for the first four most significant bits (refer to the diagram showing the device address). this is common to all the eeprom device. the next three bits are fxed to zeros. the 8th bit of device address is the read/write operation select bit. a read operation is initiated if this bit is high and a write operation is initiated if this bit is low. write operations ? byte write a write operation requires an 8-bit data word address following the device address word and acknowledgment. upon receipt of this address, the eeprom will again respond with a zero and then clock in the first 8-bit data word. after receiving the 8-bit data word, the eeprom will output a zero and the addressing device, such as a microcontroller, must terminate the write sequence with a stop condition. at this time the eeprom enters an internally-timed write cycle to the non- volatile memory. all inputs are disabled during this write cycle and eeprom will not respond until the write is completed (refer to byte write timing). ? acknowledge polling to maximise bus throughput, one technique is to allow the master to poll for an acknowledge signal after the start condition and the control byte for a write command have been sent. if the device is still busy implementing its write cycle, then no ack will be returned. the master can send the next read/write command when the ack signal has fnally been received. ? read operations the ht2201 supports three read operations, namely, current address read, random address read and sequential read. during read operation execution, the read/write select bit should be set to "1".
rev. 1.40 5 january 16, 2014 ht2201
? ? ? acknowledge polling flow ? current address read the internal data word address counter maintains the last address accessed during the last read or write operation, incremented by one. this address stays valid between operations as long as the chip power is maintained. the address roll over during read from the last byte of the last memory page to the frst byte of the frst page. the address roll over during write from the last byte of the current page to the frst byte of the same page. once the device address with the read/write select bit set to one is clocked in and acknowledged by the eeprom, the current address data word is serially clocked out. the microcontroller should respond a no ack (high) signal and following stop condition (refer to current read timing). ? random read arandom read requires a dummy byte write sequence to load in the data word address which is then clocked in and acknowledged by the eeprom. the microcontroller must then generate another start condition. the microcontroller now initiates a current address read by sending a device address with the read/write select bit high. the eeprom acknowledges the device address and serially clocks out the data word. the microcontroller should respond with a "no ack" signal (high) followed by a stop condition. (refer to random read timing). ? sequential read sequential reads are initiated by either a current address read or a random address read. after the microcontroller receives a data word, it responds with an acknowledgment. as long as the eeprom receives an acknowledgment, it will continue to increment the data word address and serially clock out sequential data words. when the memory address limit is reached, the data word address will roll over and the sequential read continues. the sequential read operation is terminated when the microcontroller responds with a "no ack" signal (high) followed by a stop condition.
rev. 1.40 6 january 16, 2014 ht2201
byte write timing current read timing random read timing
sequential read timing timing diagrams

note: the write cycle time t wr is the time from a valid stop condition of a write sequence to the end of the valid start condition of sequential command.
rev. 1.40 7 january 16, 2014 ht2201 package information note that the package information provided here is for consultation purposes only. as this information may be updated at regular intervals users are reminded to consult the holtek website for the latest version of the package information. additional supplementary information with regard to packaging is listed below. click on the relevant section to be transferred to the relevant website page. ? further package information (include outline dimensions, product tape and reel specifcations) ? packing meterials information ? carton information
rev. 1.40 8 january 16, 2014 ht2201 5-pin tsot23-5 outline dimensions symbol dimensions in inch min. nom. max. a 0.030 0.031 a1 0.000 0.002 a2 0.028 0.030 0.031 b 0.014 0.020 c 0.004 0.008 d 0.114 bsc e 0.110 bsc e1 0.063 bsc e 0.037 bsc e1 0.075 bsc l 0.015 0.018 0.024 l1 0.024 bsc 0 8 symbol dimensions in mm min. nom. max. a 0.75 0.80 a1 0.00 0.05 a2 0.70 0.75 0.78 b 0.35 0.50 c 0.10 0.20 d 2.90 bsc e 2.80 bsc e1 1.60 bsc e 0.95 bsc e1 1.90 bsc l 0.37 0.45 0.60 l1 0.60 bsc 0 8
rev. 1.40 9 january 16, 2014 ht2201 copyright ? 2014 by holtek semiconductor inc. the information appearing in this data sheet is believed to be accurate at the time of publication. however, holtek assumes no responsibility arising from the use of the specifcations described. the applications mentioned herein are used solely for the purpose of illustration and holtek makes no warranty or representation that such applications will be suitable without further modification, nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise. holtek's products are not authorized for use as critical components in life support devices or systems. holtek reserves the right to alter its products without prior notifcation. for the most up-to-date information, please visit our web site at http://www.holtek.com.tw.

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